LabWired Agent-first hardware simulation
Open source · MCP-ready · deterministic CI

Virtual validated hardware.
Build digital twins of devices with agents.

Design circuits, run firmware, compare variants, and inspect the result in Playground before building a physical board.

Connect LabWired → Open the Playground
Engine Agents assemble real hardware blocks.
Core Pins, buses, and firmware runs are validated.
Playground Humans get visual feedback they can inspect.
Supported architectures ARM Cortex-M0+ Cortex-M3 Cortex-M4 / M4F Cortex-M33 RISC-V Xtensa LX7
Trusted by embedded teams · open source GitHub stars on w1ne/labwired-core MIT licensed Last commit on labwired-core
For coding agents

Build virtual hardware in the Playground.

MCP gives agents tools to assemble embedded systems from reusable hardware blocks. LabWired Core is the engineering source of truth. Open the Playground to see the circuit run, then use the Rust core for result.json, UART, GPIO, and VCD CI evidence.

1

Choose blocks

The agent starts from boards, MCUs, sensors, displays, buttons, buses, and wires.

2

Wire and validate

MCP validates the diagram, pin functions, buses, and generated system.yaml.

3

Run firmware

Run the visual simulation in Playground first. The Rust core records result.json, UART, GPIO, and VCD evidence for CI.

4

Deploy to CI

The same validated system can move from Playground review to Rust-backed CI evidence.

Hosted MCP connector

Connect LabWired to your agent.

No local install. Connect once, then ask Claude, Cursor, Continue, or ChatGPT to build and validate virtual hardware through the LabWired engine. Playground opens when you want to watch or review the result.

Connector URL 
https://api.labwired.com/mcp

Try: "Connect LabWired, build a virtual STM32 LED circuit in the engine, validate it, and open the Playground watch URL."

Local developer setup 
claude mcp add labwired -- npx -y @labwired/mcp
Why developers switch

Why LabWired.

🎯

Deterministic

Same firmware, same cycle-exact result every run. No cable jitter, no power noise, no "ghost bugs" that vanish under the logic analyzer. Race conditions reproduce in CI.

⚡

Parallel & cheap

~6,000× wall-clock speedup. A 30-minute regression suite runs in seconds. Spawn 50 concurrent jobs across variants. No queueing for the one rig in the lab.

🔬

Observable

Every run produces JSON result + VCD trace + UART log + cycle-by-cycle PC history. Attach to bug reports. Diff traces between commits to find regressions instantly.

Featured labs · zero install

Real firmware. Real silicon parity. One click.

Each lab is a cycle-accurate firmware running in your browser. See the PC counter, live cycles, and UART output as it executes — across multiple chip families.

⚡ Blinky 📊 ADXL345 Tilt 🧭 MPU6050 IMU 🌡 BME280 Weather 📺 OLED Hello 🔥 MAX31855 📡 NEO-6M GPS 🌡️ NTC Thermistor 🎨 TFT Color 🔵 Nucleo F4

Bring your own firmware

Compile locally with your existing toolchain. Drop your firmware binary into the Playground via the Upload button. Works across every supported SoC family — STM32, RP2040, ESP32, nRF52, and more.

Open Playground →
How it works

From your firmware binary to a running simulation in seconds.

  1. 1

    Pick a board or drop your binary

    Choose from 10 starter labs, or upload your own compiled firmware. The simulator loads the matching chip + system YAML.

  2. 2

    Wire components on the canvas

    Drag I²C / SPI / UART / Analog devices from the palette. Every wire connects to a real, register-level peripheral model in our Rust core.

  3. 3

    Run with cycle-exact reproducibility

    Watch the program counter, live cycles, UART log. Every byte is deterministic — re-run produces the exact same trace.

For embedded teams

Replace your HIL bench.

Drop the GitHub Action into any repo. Get JSON + JUnit artifacts for every commit. Run unlimited parallel jobs across hardware variants. No rigs, no cables, no flaky tests.

Explore LabWired CI → 
name: Firmware Regression
on: [push]
jobs:
  test:
    runs-on: ubuntu-latest
    steps:
      - uses: actions/checkout@v4
      - run: cargo build --release \
              --target thumbv7m-none-eabi
      - uses: w1ne/labwired/.github/actions/labwired-test@main
        with:
          script: tests/regression.yaml
Open core

Built on an open simulator engine.

The Rust simulation core is open source. ARM Cortex-M0+ / M3 / M4 / M33 + RISC-V + Xtensa LX7. Peripheral models for I²C, SPI, UART, ADC, NVIC, DMA. VS Code extension, GDB / DAP server, VCD trace export. Fork it, study it, contribute back.

View on GitHub → Browse the library
Rust
cycle-accurate core engine
M0+ · M3 · M4 · M33
+ RISC-V · Xtensa LX7
DAP · GDB · VCD
standard debug interfaces
MIT
licensed

Build virtual hardware, then verify it in CI.

Open the Playground → Install MCP