The simulator I wished existed when I was debugging firmware on a train.

Why this exists

Firmware moves at the speed of the hardware in front of you. Every change means flashing a board, watching a serial port, and digging it out of a fault when something goes wrong. Catching regressions properly takes a HIL bench.

AI coding agents made that worse. They can write embedded firmware now, but they need somewhere safe to run it. A first attempt shouldn't be able to toast a $40 board, and an agent can't iterate at all if every run needs a human holding the hardware.

So I built the simulator I wanted for both. The same firmware binary that runs on hardware runs in the browser, deterministically enough to gate CI on, and there's an MCP server so a coding agent can check its own work before it ever touches silicon.

What's in the box

• Three CPU backends. ARM Cortex-M (M0+/M3/M4/M4F/M33), RISC-V RV32I/RV32A, and Xtensa LX6/LX7 (ESP32 / ESP32-S3, dual-core), all full instruction-level emulators written in Rust.
• Peripheral models. STM32 F1/F4/L4/H5/F407 peripherals (UART, SPI, I²C, GPIO, RCC, SysTick, EXTI, DMA, and more), the ESP32-S3 GPIO / I²C / VSPI / interrupt matrix / SYSTIMER, plus virtual sensors (BME280, MPU-6050, ADXL345, MAX31855, NEO-6M GPS) and displays (SSD1306, SSD1680, UC8151D, ILI9341).
• A hardware oracle. A test harness that flashes firmware to physical silicon over OpenOCD/GDB and diffs the capture against the sim trace. It's wired to a NUCLEO-H563ZI and an ESP32-S3-Zero on the build runner.
• Real debugging. A native GDB Remote Serial Protocol stub plus a VS Code Debug Adapter Protocol server: breakpoints, conditional breakpoints, data watchpoints, expression evaluation, source-line correlation.
• An MCP server for AI coding agents. It exposes simulate, validate_system, list_boards and 8 more tools, so an agent can iterate on firmware without ever reaching for the physical board.

Who it's for

• Embedded teams tired of HIL benches. Drop a GitHub Action into your repo and regression-test every firmware change against a deterministic simulator instead of a rack of dev boards. Pricing on /ci →
• AI coding agents that need a hardware sandbox. Generated firmware gets verified in a fast, deterministic environment before the first flash. The MCP server ships with the open-source core.

Building in the open

The simulator core is MIT-licensed on GitHub, and the CHANGELOG shows the pace: 15 releases between February and May 2026, including ESP32-S3 dual-core support and the hardware oracle. The issue tracker is public, and I'm glad to take contributions.

Get in touch

If LabWired could help with something you're working on, whether that's firmware CI, an agent that needs a sandbox, or teaching embedded, I'd genuinely like to hear about it.

contact@labwired.com · Book 30 minutes