A registered peripheral model runs in the engine: the firmware talks to it over the real bus and gets device-accurate responses.
Quad 2-input NAND (core/configs/devices/74hc00.yaml), tPHL/tPLH 9 ns. An unconnected input reads LOW here, so an unwired gate asserts its output HIGH.
Simulated device model
Built from the datasheet. Implemented from the part’s register documentation and exercised by automated tests. Nothing physical was ever placed next to it.
GPIO_GROUP
[object Object]
| Pin | Type | Role |
|---|---|---|
A1 | input | — |
B1 | input | — |
Y1 | output | — |
A2 | input | — |
B2 | input | — |
Y2 | output | — |
A3 | input | — |
B3 | input | — |
Y3 | output | — |
A4 | input | — |
B4 | input | — |
Y4 | output | — |
VCC | power_in | — |
GND | power_in | — |
Modelled from Nexperia 74HC00 / 74HCT00 datasheet.